Testing UVM Drivers, Part 2
In the previous post we looked at how we can emulate sequencer/driver communication using a lightweight stub of uvm_sequencer. Let's also look at some more t...
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Testing UVM Drivers
It's that time again when I've started a new project at work. Since we're going to be using some new proprietary interfaces in this chip, this calls for some...
A Quick Look at SVAUnit
I've been writing more and more SystemVerilog assertions (SVAs) lately. I find that they are the best way to capture temporal requirements, allowing the rest...
The Humble Beginnings of a SystemVerilog Reflection API, Part 3
We've already looked at how to interrogate classes about what variables they have and how to set and get the values of these variables in different instances...
The Humble Beginnings of a SystemVerilog Reflection API, Part 2
In the previous post we saw that it's possible to use the Verilog Programming Interface (VPI) to programmatically get information about classes. For example,...