Fun and Games with CRV: Einstein’s Puzzle (Revisited)
Two weeks ago, Aurelian from AMIQ published a post on how to solve the so-called Einstein's puzzle using e. At the end, he challenged us readers to try and i...
Two weeks ago, Aurelian from AMIQ published a post on how to solve the so-called Einstein's puzzle using e. At the end, he challenged us readers to try and i...
In their quest to come up with ever more efficient architectures, concept engineers sometimes do crazy things. Twin registers (also called multiview register...
We've already talked about how to handle flattened register definitions from a modeling point of view in this post. This other post also showed us that acces...
The devices that we verify often have multiple instances of a certain register type. These registers are instantiated in a regular structure inside the desig...
On my current project, I had an issue with my register definitions. Quite a few of my DUT's registers where just instances of the same register type. My vr_a...
I've been working a lot with vr_ad lately. It has a lot of nice features for modeling registers, but unfortunately not all of them are documented. I'm going ...
Earlier this month I started a new project. I'm using Specman again, so this means you'll probably see more e related posts in the future. In a previous post...
Register packages are an awesome tool to easily implement checks on the behavior of our DUT by holding a copy of its state inside a register model. When ever...
A feature where SystemVerilog really shines for hardware verification is its assertion language. Making it easy to specify complex requirements in a clear an...
A big part of verifying a design is checking its registers. A register packages is usually used to accomplish this task. It provides an abstract way of descr...